USB 3 PCIe 2 Combo PHY IP Core TSMC 28HPC T2M-IP
USB 2.0 PHY IP Core
USB 2.0/HSIC PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
USB 2.0 Switch with ESD Protection - EEWeb
USB 2.0 PHY IP core | Arasan Chip Systems
USB2.0 PHY – Silicon Library Inc.
USB 2.0 PHY IP Core Device Host OTG Hub in TSMC, 28HPC, 40LP /LL, UMC, 40LP, 28HPC, SMIC 14SF, SF, 55LL, 40LL - T2M-IP
Teledyne LeCroy - USB and USB Type-C® Electrical Test Solutions
USB 2.0 extender control chipCH317 - NanjingQinhengMicroelectronics
Webcam - Encore Electronics Inc.
Teledyne LeCroy - USB and USB Type-C® Electrical Test Solutions
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
Mixed-Signal Verification for USB 2.0 Physical Layer IP
TUSB1210-Q1 data sheet, product information and support | TI.com
USB2 Controller | Cadence
USB 2.0 Full High Speed Solution | NXP Semiconductors
TUSB1210 data sheet, product information and support | TI.com
Products-UFS-Silicon Motion
USB Universal Serial Bus
USB 3.0 PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
Soft Mixed Signal Corporation USB 2.0 PHY IP Cores
ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
PCIe/USB/SATA PHY Application Example | Renesas
Synopsys IP Technical Bulletin: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
